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Spinnerchip 1.1 Integrates Multi-protocol functions
Posted: 18-Feb-2004 [Source: Zyray Wireless]

[3G handsets get a push to market with the Zyray Wireless SPINNERchip 1.1 multi-protocol processor.]

San Diego, Calif. -- The timeline for commercial realization of UMTS-capable wireless devices has been significantly shortened with the launch of Zyray Wireless' SPINNERchip 1.1 add-on WCDMA baseband processor. SPINNERchip enables device manufacturers to develop single-mode WCDMA, dual- mode GSM/GPRS & WCDMA and multi-mode GSM/GPRS, EDGE & WCDMA devices in a low risk, cost effective and time efficient manner. A time line of 6 months from project start to Interoperability Testing (IOT) and less than one year to mass production is achievable.

"The speed of integration afforded by the add-on architecture is evident in the fact that the new SPINNERchip 1.1 has already been integrated into multiple form factor size platforms a mere 7 to 8 weeks after we received it back from the fab. We will be demonstrating two of these in Cannes; a world's first high performance multimedia phone platform supporting UMTS, EDGE and GPRS and a world's first EDGE+UMTS PC card," said Werner Sievers, President and CEO of Zyray Wireless.

SPINNERchip 1.1 is housed in a compact 10x10mm BGA including integrated analog technology and is flexible enough to mate with various RF transceivers, baseband processors and dual-mode protocol stacks. This universal flexibility has resulted in SPINNERchip being adopted by multiple Tier 1 semiconductor partners and it is already being designed into multiple end customer products. SPINNERchip can also be provided in die form to be included in customizable MCM (Multi Chip Module) solutions. Given the availability of many existing mature, high volume 2G / 2.5G solutions, SPINNERchip's ability to integrate with these maximizes the benefit from their high volume/lower cost.

SPINNERchip 1.1 is fully 3GPP Release 99 December 2003 compliant and is firmware upgradeable to support Downlink Shared Channel (DSCH) and all other 3GPP Release 4 features. A configurable hardware / flexible software design approach was chosen for SPINNERchip to ensure a robust design platform for future developments as well as to facilitate low power consumption. SPINNERchip supports 384kb/s in both the uplink and downlink and is upgradeable to a 2Mb/s class modem. SPINNERchip includes proprietary Adaptive Interference Cancellation (AIC) and Optimum Combining algorithms and support for multiple antennas in either handset or PCMCIA platforms.

A full suite of support peripherals and services are provided with SPINNERchip. "The support provided by the Zyray engineering team is key to the short integration times we have been able to achieve.

We provide a complete solution with SPINNERchip, which includes evaluation boards, software development and testing tools and excellent real-time tracing and data logging capabilities. Beyond that we work very closely with our partners to ensure a quick turnaround on customer projects, " said Michiel Lotter, VP of Engineering.

Upcoming versions of SPINNERchip will support future evolutions of 3G technology including HSDPA (high-speed downlink packet access). HSDPA, an enhancement to W-CDMA technology, provides ultra high-speed downlink capability.

SPINNERchip with its unique architecture recently received the 'Most Innovative Product' Award from UCSD Connect. Part of the University of California, San Diego, CONNECT is a globally recognized organization supporting the growth of the most promising technology businesses.

Zyray will demonstrate SPINNERchip 1.1, Stand F22, Hall 2 at the 3GSM World Congress, Cannes, France, 23rd to 26th February 2004.


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